The article “How to Access the Benefits of Digital Power in an Analog System” discusses the benefits of using a no-bus approach when designing a power system. Written by CUI Technical Marketing Manager, Bruce Rose, and published in the June 2013 issue of Electronic Products, the article begins:
The no-bus approach lets system architects benefit from efficiency gains, transient response and auto-compensation advantages inherent in digital power without incorporating a digital bus.
As silicon fabrication technologies used to construct ICs — microprocessors, FPGAs, or special-function devices such as network or communications processors — have gone from generation to generation, the number of transistors has grown ever-larger, the individual devices have grown smaller, and the operating voltage they can tolerate has diminished. The core voltage that such a chip runs at today may be less than 1 V; 0.9 V is commonplace.
So, when you are designing the final stages of a power system that will satisfy the demands of the latest ICs on a high-density circuit board, the performance of your point-of-load (POL) dc/dc converter will be critical to the performance of the entire board, and system.
And while individual transistors in today’s most advanced ICs may use less power, there are millions more of them. As a consequence, design engineers have struggled to keep power consumption in check.
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